Hardware Accelerated Communication Systems

Hardware Accelerated Communication Systems explores the integration of hardware acceleration technologies, such as programmble ASICs, FPGAs and SmartNICs, into modern communication networks to enhance performance and efficiency. This course builds on the fundamentals of networking to cover key topics like programmable data planes, network function virtualization (NFV), and high-performance network architectures. Students will learn how to design, implement, and manage accelerated communication systems, allowing for real-time adaptability and centralized control. Practical applications in data centers, ISPs, and 5G networks are also explored.

Contents

  • Architecture of Hardware-Accelerated Networks
  • Domain-Specific Programming languages for Programmable Data Planes
  • Hardware Acceleration for Network Applications
  • High-Performance Network Switches
  • Network Function Virtualization
  • Controllers in Hardware-Accelerated Systems

Dates

Winter term

Lecture

Exercise

Materials

Materials will be distributed via Stud.IP

Exam

Oral Exam


Ihr Dozent

Prof. Dr. Amr Rizk
Professors
Address
Appelstraße 9a
30167 Hannover
Building
Room
Prof. Dr. Amr Rizk
Professors
Address
Appelstraße 9a
30167 Hannover
Building
Room