im QIS
Contents
- Architecture of Hardware-Accelerated Networks
- Domain-Specific Programming languages for Programmable Data Planes
- Hardware Acceleration for Network Applications
- High-Performance Network Switches
- Network Function Virtualization
- Controllers in Hardware-Accelerated Systems
Materials
Materials will be distributed via Stud.IP
Exam
Oral Exam.
Please contact hks@ikt.uni-hannover.de to schedule a slot for the exam.
Prüfungs- und Vorlesungsanmeldung
Ihr Dozent
30167 Hannover